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Lesson HSDD-40-02 2017 week 12 Vias and Mode Conversion
with Eric Bogatin,
Signal Integrity Evengelist
Teledyne LeCroy Front Range Signal Integrity Lab
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HSDD-40-02 2017 week 12 Vias and Mode Conversion

  • The four problems interconnect create in high speed serial links
  • How to optimize the design of a transparent via
  • Simulating the worst case impact of a through via
  • Simulating the worst case impact of a via stub
  • Interpreting the signle and differential S-parameters
  • How an asymmetry creates mode conversion
  • How much length difference is acceptable
  • Simulating mode conversion
  • The impact from glass weave skew
  • Lab assignment for week 12

 

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